PERS - System Informacji o Pracownikach

SKEP - Wyniki wyszukiwania wśród publikacji


Szukanie:
w opisie bibliograficznym
Wprowadzona fraza:
{Electronics}
Opublikowano w latach:
1960 - 2022
Znaleziono:
297 (spośród około 72873)

76.
Modelling and analysis of three-phase hybrid transformer with buck-boost matrix-reactance chopper and active load, 2014, Zbigniew Fedyczak , Jacek Kaniewski , Paweł Szcześniak , Marius Klytta , W: Power Electronics and Applications - EPE' 14-ECCE Europe [Dokument elektroniczny]: 16th European Conference, Lappeenranta, Finlandia, New York: IEEE, 2014, s. 1--10, ISBN: 978-1-4799-3015-9,
Słowa kluczowe: AC/AC converter, Power conditioning, Three-phase system, Transformer, Voltage sag compensators
Kod: KON-WoS BibTeX (pkt. 15) DOI: 10.1109/EPE.2014.6910987
[KONF-21504] [data modyf. 06-04-2021 13:59]

77.
Model predictive control of three phase voltage source converters with an LCL filter, 2014, Dae Keun Yoo , Liuping Wang , Eric Rogers , Wojciech Paszke , W: IEEE 23rd International Symposium on Industrial Electronics - ISIE 2014, Istanbul, Turcja, [B. m.]: [brak wydawcy], 2014, s. 562--567,
Kod: KON-WoS BibTeX (pkt. 15) DOI: 10.1109/ISIE.2014.6864674
[KONF-21502] [data modyf. 06-04-2021 13:59]

78.
Matrix Converter Interfaces Two Three-Phase AC Systems as a Component of Smart-Grid, 2014, Paweł Szcześniak , W: Power Electronics, Electrical Drives, Automation and Motion - SPEEDAM 2014: International Symposium, Ischia, Włochy, [b. m.]: IEEE Conference Publications, 2014, s. 676--681, ISBN: 9781479947508,
Słowa kluczowe: AC systems, matrix converter, smart-gird
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-21386] [data modyf. 06-04-2021 13:59]

79.
Hardware-accelerated spike train generation for neuromorphic image and video processing, 2014, T. Iakymchuk , A. Rosado-Munoz , M. Bataller-Mompeán , Marek Węgrzyn , Marian Adamski , W: IX Southern Conference on Programmable Logic - SPL, Buenos-Aires, Argentyna, Piscataway: Institute of Electrical and Electronics Engineers, 2014, s. 41--46, ISBN: 9781479968480,
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-21620] [data modyf. 06-04-2021 13:59]

80.
Digital signal processing in power electronics control circuits, 2013, Krzysztof Sozański , London: Springer-Verlag, s. 265, (Power Systems), ISBN: 9781447152675, bibliogr. rys. tab. wykr.
Kod: MON-ANG BibTeX (pkt. 25) DOI: 10.1007/978-1-4471-5267-5
[WZ-11673] [data modyf. 06-04-2021 13:59]

81.
Implementation of algorithm of Petri nets distributed synthesis into FPGA, 2013, Arkadiusz Bukowiec , Jacek Tkacz , Tomasz Gratkowski , Tomasz Gidlewicz , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 317--324, bibliogr. summ.
Słowa kluczowe: C#, FPGA, Petri net, decomposition, logic synthesis
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0038
Cytowania wg WOS: 5 [04-03-2024],
[AWCZ-17877] [data modyf. 06-04-2021 13:59]

82.
Partial reconfiguration in the field of logic controllers design, 2013, Michał Doligalski , Arkadiusz Bukowiec , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 351--356, bibliogr. summ.
Słowa kluczowe: HCfgPN, UMLstate machine diagram, logic controller, verilog
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0042
Cytowania wg WOS: 6 [25-03-2024],
[AWCZ-17875] [data modyf. 06-04-2021 13:59]

83.
Selection of wavelet video codec parameters to optimize coding time, 2013, Andrzej Popławski , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 341--349, bibliogr. summ.
Słowa kluczowe: optimization, scalability, wavelet video coding
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0041
Cytowania wg WOS: 1 [18-03-2024],
[AWCZ-17872] [data modyf. 06-04-2021 13:59]

84.
Structured mapping of Petri net states and events for FPGA implementations, 2013, Jacek Tkacz , Marian Adamski , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 331--339, bibliogr. summ.
Słowa kluczowe: FPGA, Gentzen sequents, Petri net coloring, VHDL, configurable logic controllers, hypergraph, interpreted Petri net state space, local and global state encoding, logic design
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0040
Cytowania wg WOS: 2 [25-03-2024],
[AWCZ-17876] [data modyf. 06-04-2021 13:59]

85.
Conception of a control unit for critical systems, 2013, Marek Sałamaj , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 363--368, bibliogr. summ.
Słowa kluczowe: FPGA, conception, critical systems, master-slave architecture, safety logic microcontroller
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0044
Cytowania wg WOS: 2 [18-03-2024],
[AWCZ-17873] [data modyf. 06-04-2021 13:59]

86.
Experimental comparison of synthesis tools Altera Quartus II and synthagate, 2013, Marek Węgrzyn , Andrei Karatkevich , International Journal of Electronics and Telecommunications, Vol. 59, no. 4, 357--362, bibliogr. summ.
Słowa kluczowe: FPGA, VHDL, logic design, logic devices, state machines
Kod: CZR-WYKAZ BibTeX (pkt. [?]) DOI: 10.2478/eletel-2013-0043
Cytowania wg WOS: 0 [25-03-2024],
[AWCZ-17874] [data modyf. 06-04-2021 13:59]

87.
AC/DC/DC interfaces for V2G applications - EMC issues, 2013, Robert Smoleński , Marcin Jarnut , Grzegorz Benysek , Adam Kempski , IEEE Transactions on Industrial Electronics, Vol. 60, no. 3, 930--935, ISSN: 0278-0046, bibliogr. rys. wykr. summ.
Słowa kluczowe: electromagnetic compatibility (EMC), filters, interference elimination, rectifiers, vehicles
Kod: CZR-JCR BibTeX (pkt. 50) DOI: 10.1109/TIE.2012.2188876
Cytowania wg WOS: 26 [25-03-2024], JIF: 6.500
[AWCZ-17836] [data modyf. 06-04-2021 13:59]

88.
Voltage perturbations compensator on the base of three-phase hybrid transformer, 2013, Grzegorz Benysek , Jacek Kaniewski , W: 1st International Future Energy Electronics Conference - IFEEC 2013, Tainan, Tajwan, Piscataway: [brak wydawcy], 2013, s. 63--68, ISBN: 9781479900718,
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-21058] [data modyf. 06-04-2021 13:59]

89.
CM voltage compensator for DC/DC converters, 2013, Robert Smoleński , Marcin Jarnut , Jacek Bojarski , W: Compatibility and Power Electronics - CPE 2013 [Dokument elektroniczny]: international conference - workshop, Ljubljana, Słowenia, New York: IEEE Xplore, 2013, s. 264--268, ISBN: 9781467349116,
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-20896] [data modyf. 06-04-2021 13:59]

90.
State of the art of active power electronic transformers for smart grids, 2012, Indrek Roasto , Enrique Romero-Cadaval , Joao Martins , Robert Smoleński , W: 38th Annual Conference of the IEEE Industrial Electronics Society - IECON 2012, Montreal, Kanada, [B. m.]: [brak wydawcy], 2012, s. 5223--5228,
Słowa kluczowe: AC-DC power converters, DC-DC power converters, electromagnetic compatibility, power electronics converters, power transformers, smart grids
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-20567] [data modyf. 06-04-2021 13:59]

91. Pump-probe spectra modeled with inclusion of a dipole-coupled but not dipole-probed F' state, for the case of 85Rb 5S1/2(F) <->5P3/4(F') transitions, 2012, Agnieszka Żaba , E. Paul-Kwiek , K. Kowalski , J. Szonert , Dariusz Woźniak , S. Gateva , Van Cao Long , M. Głódź , W: 17th International School on Quantum Electronics: Laser physics and applications, Nessebar, Bułgaria, [b. m.]: SPIE, 2013, Proceedings of SPIE Vol. 8770, s. [Q1--Q6], - ISSN 0277-786X
Kod: KON-ANG BibTeX (pkt. 0)
[KONF-20812] [data modyf. 20-04-2021 14:10]

92.
The problems of transition predicates construction in hierarchical concurrent controllers, 2012, Grzegorz Łabiak , International Journal of Electronics and Telecommunications, Vol. 58, no 4, 411--418, bibliogr. rys. summ.
Słowa kluczowe: Boolena predicates, binary control system, clique problem, compatibility classes, computational complexity, concurrency, conflicting transitions, hierarchy, statechart diagrams
Kod: CZR-WYKAZ BibTeX (pkt. 8)
[AWCZ-16857] [data modyf. 06-04-2021 13:59]

93.
An exact soluble equation for the steady state probability distribution in a nonlinear system: application to the noise reduction in Raman Ring Laser, 2012, Van Cao Long , Quoc Khoa Doan , Optical and Quantum Electronics, Vol. 43, 137--145, ISSN: 0306-8919, eISSN: 1572-817X, bibliogr. wykr. summ.
Słowa kluczowe: Raman Ring Laser, exact soluble stichastic equations, noise reduction
Kod: CZR-JCR BibTeX (pkt. 20) DOI: 10.1007/s11082-011-9516-1
Cytowania wg WOS: 3 [25-03-2024],
[AWCZ-16104] [data modyf. 24-06-2022 11:38]

94.
A new conception of safety logic microcontroller, 2012, Marek Sałamaj , International Journal of Electronics and Telecommunications, Vol. 58, no 4, 419--424, bibliogr. rys. tab. summ.
Słowa kluczowe: GALS, conception, critical systems, handshake, master-slave architecture, safety logic microcontroller
Kod: CZR-WYKAZ BibTeX (pkt. 8) DOI: 10.2478/v10177-012-0057-8
Cytowania wg WOS: 0 [25-03-2024],
[AWCZ-17011] [data modyf. 06-04-2021 13:59]

95.
Linguistically Aware Semantic Network for Automated Information Tracking, 2012, Konstanty Haniewicz , Magdalena Adamczyk , Wojciech Rutkowski , W: The 8th International Conference on Signal Image Technology & Internet Based Systems SITIS 2012, Sorrento, Włochy, --: The Institute of Electrical and Electronics Engineers, Inc., 2012, s. 503--509, ISBN: 9780769549118,
Kod: KON-ANG BibTeX (pkt. 0)
[KONF-20806] [data modyf. 06-04-2021 13:59]

96.
Hardware-efficient matrix inversion algorithm for complex adaptive systems, 2012, Alfredo Rosado , Taras Iakymchuk , Manuel Bataller , Marek Węgrzyn , W: ICECS 2012 - 19th IEEE Conference on Electronics, Circuits and Systems, Seville, Hiszpania, -: [brak wydawcy], 2012, s. 41--44, ISBN: 9781467312608/12,
Kod: KON-ANG BibTeX (pkt. 0)
[KONF-20665] [data modyf. 06-04-2021 13:59]

97.
Petri net based specification in the design of logic controllers with exception handling mechanism, 2012, Michał Doligalski , Marian Adamski , International Journal of Electronics and Telecommunications, Vol. 58, no 1, 43--48, bibliogr. rys. tab. summ.
Słowa kluczowe: Logic controller, UML, dual specification, hierarchical Petri net, state machine diagram
Kod: CZR-WYKAZ BibTeX (pkt. 8) DOI: 10.2478/v10177-012-0006-6
Cytowania wg WOS: 2 [19-02-2024],
[AWCZ-16440] [data modyf. 18-10-2021 11:47]

98.
Optimizaciâ shemy avtomata Mura, realizemoj v bazise PLIS, 2012, Oleksandr Barkalov , R. V. Mal'čeva , K. A. Soldatov , Radio Electronics Computer Science Control, no 1(26), 44--47, ISSN: 1607-3274, eISSN: 2313-688X, bibliogr. rys. tab. summ.
Kod: CZR-INNE BibTeX (pkt. 0)
[AWCZ-16731] [data modyf. 06-04-2021 13:59]

99.
Hierarchical configurable Petri net modeling in VHDL, 2012, Michał Doligalski , Marian Adamski , International Journal of Electronics and Telecommunications, Vol. 58, no. 4, 397--402, bibliogr. rys. summ.
Słowa kluczowe: UML state machine diagram, VHDL, index Terms - HCfgPN, logic controller
Kod: CZR-WYKAZ BibTeX (pkt. 8) DOI: 0.2478/v10177-012-0054-y
[AWCZ-16865] [data modyf. 06-04-2021 13:59]

100. A comparison of basic properties of the integrated and cascade matrix-reactance fraquency converters, 2012, Zbigniew Fedyczak , Paweł Szcześniak , Grzegorz Tadra , Marius Klytta , W: 15th International Power Electronics and Motion Control Conference and Exposition - EPE-PEMC 2012, Novi Sad, Serbia, [B. m.]: [brak wydawcy], 2012, s. [6] CD-ROM, ISBN: 9781467319713,
Kod: KON-WoS BibTeX (pkt. 15)
[KONF-20556] [data modyf. 20-04-2021 14:09]